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broadcom - 1 - description the acpl-k71t and acpl-k72t are high-speed digital cmos optocouplers package suitable for emerging electric vehicle applications. the acpl-k74t and acpl-k75t are dual-channel equivalents of the acpl-k71t and acpl-k72t, respectively. all products are available in the stretched so-8 package outline, designed to be compatible with standard surface mount processes. acpl-k71t and acpl-k74t are high-speed mode with fastest propagation delay (maximum 35 ns at i f = 10 ma) while acpl-k72t and acpl-k75t are low-power mode with lowest led drive current of 4 ma fo r standard digital isolation switching. each channel of the digital optocoupler has a cmos detector ic with an integrated photodiode, a high-speed trans-impedance amplifier, and a voltage comparator with an output driver. the broadcom r 2 coupler? provides with reinforced insulation and reliability that delivers safe signal isolation critical in automotive and high-temperatu re industrial applications. caution take normal static precautions in handling and assembly of this compone nt to prevent damage. degradation, or both th at might be induced by electrostatic discharge (esd). features ? qualified to aec-q100 grade 1 test guidelines ? automotive wide temperature range: C40c to 125c ? high temperature and reliab ility, high-speed digital interface for automotive applications ? 5-v cmos compatibility ? 40 kv/s common-mode rejection at v cm = 1000v typ. ? low propagation delay: acpl-k71t, acpl-k74t: 25 ns typ. @ i f = 10 ma acpl-k72t, acplk75t: 60 ns typ. @ i f = 4 ma ? worldwide safety approval: ul 1577 approval, 5kv rms /1 min. csa approval iec/en/din en 60747-5-5 applications ? can bus and spi communications interface ? high-temperature digital/analog signal isolation ? automotive ipm driver for dc-dc converters and motor inverters ? power transistor isolation acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t automotive high-speed low-power digital optocouplers with r 2 coupler? isolation and aec-q100 grade 1 qualification data sheet
broadcom - 2 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet functional diagrams functional diagrams figure 1 acpl-k71t/acpl-k72t note the connection of a 0.1-f bypass capacitor between pins 5 and 8 is recommended. figure 2 acpl-k74t/acplk75t note the connection of a 0.1-f bypass capacitor between pins 5 and 8 is recommended. table 1 truth table led vo on low off high table 2 pin assignments for acpl-k71t/acpl-k72t pin no. pin name description pin no. pin name description 1ananode 5gndground 2cacathode 6ncno connection 3 nc no connection 7 v out output 4 nc no connection 8 v dd power supply table 3 pin assignments for acpl-k74t/acpl-k75t pin no. pin name description pin no. pin name description 1an1anode 1 5gndground 2ca1cathode 1 6v out2 output 2 3ca2cathode 2 7v out1 output 1 4an2anode 2 8v dd power supply
broadcom - 3 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet ordering information ordering information to order, choose a part number from the part number column and combine with the desired opti on from the option column to form an order entry. example 1: acpl-k71t-560e to order product of sso-8 surface mount package in tape and reel packaging with iec/en/din en 60747-5-5 safety approval in rohs compliant. option data sheets are available. contact your broadcom sa les representative or authoriz ed distributor for information. part number option (rohs compliant) package surface mount tape and reel ul 5000 vrms / 1 minute rating iec/en/din en 60747-5-5 quantity acpl-k71t -000e stretched so-8 x x 80 per tube -060e x x x 80 per tube -500e x x x 1000 per reel -560e x x x x 1000 per reel acpl-k72t -000e stretched so-8 x x 80 per tube -060e x x x 80 per tube -500e x x x 1000 per reel -560e x x x x 1000 per reel acpl-k74t -000e stretched so-8 x x 80 per tube -060e x x x 80 per tube -500e x x x 1000 per reel -560e x x x x 1000 per reel acpl-k75t -000e stretched so-8 x x 80 per tube -060e x x x 80 per tube -500e x x x 1000 per reel -560e x x x x 1000 per reel
broadcom - 4 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet package outline dimensions (stretched so8) package outline dimensions (stretched so8) recommended pb-free ir profile recommended reflow condition as per jede c standard, j-std-020 (latest revision). note use non-halide flux. regulatory information the acpl-k71t, acpl-k72t, acpl-k74t and acpl-k75t are approved by the following organizations: table 4 regulatory information ul approval under ul 1577, component recognition program up to v iso = 5 kv rms . csa approval under csa component acceptance notice #5. iec/en/din en 60747-5-5 approval under iec/en/din en 60747-5-5. 5.850 0.254 (0.230 0.010) 5 6 7 8 4 3 2 1 dimensions in millimeters and (inches). note: lead coplanarity = 0.1 mm (0.004 inches). floating lead protrusion = 0.25mm (10mils) max. 6.807 0.127 (0.268 0.005) recommended land pattern 12.650 (0.498) 1.905 (0.075) 3.180 0.127 (0.125 0.005) 0.381 0.127 (0.015 0.005) 1.270 (0.050) bsg 7 0.254 0.100 (0.010 0.004) 0.750 0.250 (0.0295 0.010) 11.50 0.250 (0.453 0.010) 1.590 0.127 (0.063 0.005) 0.450 (0.018) 45 rohs-compliance indicator 0.64 (0.025) 0.200 0.100 (0.008 0.004)
broadcom - 5 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet insulation and safety-related specifications insulation and safety-related specifications iec/en/din en 60747-5-5 insulation re lated characteristic (option 060 only) parameter symbol units conditions minimum external air gap (clearance) l(101) 8 mm measured from input termina ls to output terminals, shortest distance through air. minimum external tracking (creepage) l(102) 8 mm measured from input termina ls to output terminals, shortest distance path along body. minimum internal plastic gap (internal clearance) 0.08 mm through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. tracking resistance (comparative tracking index) cti 175 v din iec 112/vde 0303 part 1 isolation group (din vde0109) iiia material group (din vde 0109) description symbol characteristic units installation classification per din vde 0110/1.89, table 1 for rated mains voltage 600 v rms i-iv for rated mains voltage 1000 v rms i-iii climatic classification 40/125/21 pollution degree (din vde 0110/1.89) 2 maximum working insulation voltage v iorm 1140 v peak input to output test voltage, method b v iorm 1.875 = v pr , 100% production test with t m = 1 s, partial discharge < 5 pc v pr 2137 v peak input to output test voltage, method a v iorm 1.6 = v pr , type and sample test, t m = 10s, partial discharge < 5 pc v pr 1824 v peak highest allowable overvoltage (transient overvoltage, t ini = 60s) v iotm 8000 v peak safety limiting values (ma ximum values allowed in the event of a failure) case temperature t s 175 c input current i s,input 230 ma output power p s,output 600 mw insulation resistance at t s , v io = 500v r s 109 ?
broadcom - 6 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet absolute maximum ratings absolute maximum ratings recommended operating conditions electrical specifications over recommended temperature t a = C40c to 125c, 3.0v v dd 5.5v. all typical specifications are at t a = 25c, v dd = 5v. parameter symbol min. max. units test conditions storage temperature t s C55 130 c ambient operating temperature t a C40 125 c supply voltages v dd 06.5v output voltage v o C0.5 vdd +0.5 v average forward input current i f 20.0 ma peak transient input current i f(tran) 1 a 1-s pulse width, 300 pps 80 ma 1-s pulse width, <10% duty cycle reverse input voltage vr 5 v input power dissipation pi 40 mw output power dissipation po 30 mw lead solder temperature 260c fo r 10s., 1.6 mm below seating plane solder reflow temperature profile see so lder reflow temperature profile section parameter symbol min. max. units note supply voltage v cc 3.0 5.5 v operating temperature t a C40 125 c forward input current i f(on) 415ma forward off state voltage v f(off) 0.8v input threshold current ith 3.5 ma parameter symbol min. typ. max. units test conditions figure notes led forward voltage v f 1.45 1.25 1.5 1.5 1.75 1.85 v v i f =10 ma, t a =25c i f =10 ma vf temperature coefficient C1.5 mv/c input capacitance c in 90pf input reverse breakdown voltage bv r 5.0 v i r = 10 a logic high output voltage v oh v dd C 0.6v i oh = C3.2 ma 6 logic low output voltage v ol 0.6vi ol = 4 ma 5 logic low output supply current (per channel) i ddl 0.91.5ma logic high output supply current (per channel) i ddh 0.91.5ma
broadcom - 7 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet acpl-k71t, acpl-k74t high-speed mode switching specifications acpl-k71t, acpl-k74t high-speed mode switching specifications over recommended temperature t a = C40c to 125c, 4.5v v dd 5.5v. all typical specifications are at t a = 25c, v dd = 5v. parameter symbol min. typ. max. units test conditions figure notes propagation delay time to logic low output t phl 2535nsv in = 4.5v to 5.5v, r in = 390 ? 5%, c in = 100 pf, c l = 15 pf, v thl = 0.8v, v tlh = 80% of v dd 7 , 8 , 13 a , b , c a. t phl propagation delay is measured from the 50% (v in or i f ) on the rising edge of the input pulse to the 0.8v of v dd of the falling edge of the v o signal. t plh propagation delay is measured from the 50% (v in or i f ) on the falling edge of the input pulse to the 80% level of the rising edge of the v o signal. b. pwd is defined as |t phl C t plh |. c. t psk is equal to the magnitude of the worst case difference in t phl and/or t plh that will be seen between units at any given temperature within the recommended operating conditions. propagation delay time to logic high output t plh 2535ns pulse width distortion pwd 0 12 ns propagation delay skew t psk 15ns output rise time (10% C 90%) t r 10ns output fall time (90% - 10%) t f 10ns common mode transient immunity at logic high output | cm h |1525kv/sv in = 0v, r in = 390 ? 5%, c in = 100 pf, v cm = 1000v, t a = 25c 14 d d. cm h is the maximum tolerable rate of rise of the common mode voltag e to assure that the output will remain in a high logic state. common mode transient immunity at logic high output | cm l |1525kv/sv in = 4.5v to 5.5v, r in = 390 ? 5%, c in = 100 pf, v cm = 1000v, t a = 25c 14 e e. cm l is the maximum tolerable rate of fall of the common mode voltag e to assure that the output will remain in a low logic state.
broadcom - 8 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet acpl-k72t, acpl-k75t low-power mode switching specifications acpl-k72t, acpl-k75t low-power mode switching specifications over recommended temperature t a = C40c to 125c, 3.0v v dd 5.5v. all typical specifications are at t a =25c, v dd = 5v. package characteristics all typical at t a = 25c. parameter symbol min. typ. max. units test conditions figure notes propagation delay time to logic low output t phl 60 100 ns i f = 4 ma, c l = 15 pf, v thl = 0.8v, v tlh = 80% of v dd 9 , 10 , 11 , 12 , 15 a b , c a. t phl propagation delay is measured from the 50% (v in or i f ) on the rising edge of the input pulse to the 0.8v of v dd of the falling edge of the v o signal. t plh propagation delay is measured from the 50% (v in or i f ) on the falling edge of the input pulse to the 80% level of the rising edge of the v o signal. b. pwd is defined as |t phl C t plh |. c. t psk is equal to the magnitude of the worst case difference in t phl and/or t plh that will be seen between units at any given temperature within the recommended operating conditions. propagation delay time to logic high output t plh 35 100 ns pulse width distortion pwd 25 50 ns propagation delay skew t psk 60ns output rise time (10%C90%) t r 10ns output fall time (90%C10%) t f 10ns common mode transient immunity at logic high output | cm h | 25 40 kv/s led driving circuit fig 13, v in = 0v, r1 = 350 ? 5%, r2 = 350 ? 5%, v cm = 1000v, t a = 25c 16 d d. cm h is the maximum tolerable rate of rise of the common mode voltag e to assure that the output will remain in a high logic state. common mode transient immunity at logic high output | cm l |2540kv/sled driving circuit fig 14, v in = 4.5v to 5.5v, r1 = 350 ? 5%, r2 = 350 ? 5%, v cm = 1000v, t a = 25c 16 e e. cm l is the maximum tolerable rate of fall of the common mode voltag e to assure that the output will remain in a low logic state. parameter symbol min. typ. max. units test conditions notes input-output momentary withstand voltage v iso 5000 v rms rh 50%, t = 1 minute, t a = 25c a , b a. device considered a two terminal device: pins 1, 2, 3, and 4 shorted together, an d pins 5, 6, 7, and 8 shorted together. b. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000v rms for 1 second. input-output resistance r i-o 1014 ? v i-o = 500v dc a input-output capacitance c i-o 0.6pff = 1 mhz, t a = 25c a
broadcom - 9 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet performance plots performance plots figure 3 typical diode input forward current characteristic figure 4 typical output voltage vs. input forward current 0.01 0.10 1.00 10.00 100.00 1.2 1.3 1.4 1.5 1.6 v f - forward voltage - v i f - forward current (ma) ta = 25c i f - forward current - ma 0 1 2 3 4 5 00.511.52 vo - output voltage (v) figure 5 typical logic low output voltage vs. logic low output current figure 6 typical logic high output voltage vs. logic high output current 0.000 0.100 0.200 0.300 0.400 0.500 0.600 0.700 0246810 i ol - logic low output current - ma v ol - logic low output voltage - v 4.0 4.2 4.4 4.6 4.8 5.0 -10 -8 -6 -4 -2 0 i oh - logic high output current - ma v oh - logic high output voltage - v figure 7 acpl-k71t/k74t (high speed) typical propagation delay s. temperature figure 8 acpl-k71t/k74t (high speed) typical propagation delay s. input forward current 0 5 10 15 20 25 30 35 40 -40 -20 0 20 40 60 80 100 120 140 temperature - c tp - propagation delay, pwd - pulse width distortion - ns t phl vin=4.5v, rin=390 : , cin=100pf t plh pwd -5 0 5 10 15 20 25 30 35 40 3456789101112131415 i f - forward current - ma tp - propagation delay, pwd - pulse width distortion - ns t phl rin=390 : , cin=100pf t plh ta=25c pwd
broadcom - 10 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet performance plots figure 9 acpl-k72t/k75t (5v) typical propagation delay vs. temperature figure 10 acpl-k72t/k75t (5v) typical propagation delay vs. input forward current 0 10 20 30 40 50 60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c i f = 4ma, v dd =5v t p - propagation delay - ns t phl t plh pwd -10 0 10 20 30 40 50 60 70 3 4 5 6 7 8 9 101112131415 i f - forward current - ma t a =25 c, v dd =5v t p - propagation delay - ns t phl t plh pwd figure 11 acpl-k72t/k75t (3v) typical propagation delay s. temperature figure 12 acpl-k72t/k75t (3v) typical propagation delay s. input forward current 0 10 20 30 40 50 60 70 80 90 -40 -20 0 20 40 60 80 100 120 t a - temperature - c t p - propagation delay - ns i f = 4ma, v dd =3v t phl t plh pwd 0 10 20 30 40 50 60 70 80 3456789101112131415 i f - forward current - ma t p - propagation delay - ns t a =25 c, v dd =3v t phl t plh pwd
broadcom - 11 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet acpl-k71t/k74t high-speed mode acpl-k71t/k74t high-speed mode figure 13 high-speed mode switching test circuit and typical waveform figure 14 high-speed mode cmr test circuit and typical waveform acpl-k72t/k75t low-power mode: figure 15 low-power mode switching test circuit and typical waveform + _ v dd 5v v o monitoring node c in 100pf r 1 3905% c l = 15pf 0.1 f v in 4.5v to 5.5v gnd1 gnd2 v in v o v tlh v thl v in /2 v in /2 t plh t phl 8 7 6 5 1 2 3 4 acpl-k71t v cm v oh t r t f 10% 90% 10% 90% t r = t f 80 ns switch at led=off v ol switch at led=on 1000v v dd 5v v o monitoring node c in 100pf r 1 3905% c l = 15pf 0.1 f v in 4.5v to 5.5v gnd1 gnd2 high voltage pulse v cm + _ 8 7 6 5 1 2 3 4 acpl-k71t + _ v dd 3v to5v v o monitoring node r in 700 c l = 15pf 0.1 f v in 4.5v to 5.5v gnd1 gnd2 v in v o v tlh v thl v in /2 v in /2 t plh t phl 8 7 6 5 1 2 3 4 acpl-k72t
broadcom - 12 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet recommended application circuits figure 16 low-power mode cmr test circuit recommended application circuits figure 17 recommended application circuit for acpl-k71t/k74t high-speed performance figure 18 recommended application circuit for acpl-k72t/k75t low-power performance v cm v oh t r t f 10% 90% 10% 90% t r = t f 80 ns switch at led=off v ol switch at led=on 1000v 8 7 6 5 1 2 3 4 v dd 5v v o monitoring node r 1 350 c l = 15pf 0.1 f v in 4.5v to 5.5v gnd1 gnd2 acpl-k72t high voltage pulse v cm + _ r 2 350 c in 100pf 8 7 6 5 1 2 3 4 v dd v o r 1 0.1 f v in gnd1 gnd2 acpl-k71t truth table v in led vo low on low high off high 8 7 6 5 1 2 3 4 v dd v o r 1 0.1 f v in gnd1 gnd2 r 2 r1 = r 2 acpl-k72t truth table v in led vo low on low high off high
broadcom - 13 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet thermal resistance mo del for acpl-k71t/k72t thermal resistance model for acpl-k71t/k72t the diagram of acpl-k71t/k72t for measurement is shown in figure 19 . here, one die is heated first and the temperatures of all the dice are recorded after thermal equilibrium is reached. then, the second die is heated and all the dice temperatures are record ed. with the known ambient temperature, the die junction temper ature and power dissipation, th e thermal resist ance can be calculated. the thermal resistance calculation can be cast in ma trix form. this yields a 2 by 2 matrix for our case of two heat sources. figure 19 diagram of acpl-k71t/k72t for measurement r 11 : thermal resistance of die1 due to heating of die1 (c/w) r 12 : thermal resistance of die1 due to heating of die2 (c/w) r 21 : thermal resistance of die2 due to heating of die1 (c/w) r 22 : thermal resistance of die2 due to heating of die2 (c/w) p 1 : power dissipation of die1 (w) p 2 : power dissipation of die2 (w) t 1 : junction temperature of die1 due to heat from all dice (c) t 2 : junction temperature of die2 due to heat from all dice (c) t a : ambient temperature (c) ? t 1 : temperature difference between die1 junction and ambient (c) ? t 2 : temperature deference between die2 junction and ambient (c) t 1 = (r 11 p 1 + r 12 p 2 ) + t a t 2 = (r 21 p 1 + r 22 p 2 ) + t a measurement data on a low k board: r 11 = 160c/w, r 12 = r 21 = 74c/w, r 22 = 115c/w r 11 r 12 p 1 = ? t 1 r 21 r 22 p 2 ? t 2 1 2 3 4 8 7 6 5 die1: led die2: detector
broadcom - 14 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet thermal resistance mo del for acpl-k74t/k75t thermal resistance model for acpl-k74t/k75t the diagram of acpl-k74t/k75t for measurement is shown in figure 20 . here, one die is heated first and the temperatures of all the dice are recorded after thermal equilibrium is reached. then, the second, third and fourth die is heated and all the dice temperatures are recorded. with the known ambient temperatur e, the die junction temperat ure and power dissipation, the thermal resistance can be calculated. the thermal resistance calculation can be cast in matrix form. this yields a 4 by 4 matri x for our case of two heat sources.. figure 20 diagram of acpl-k74t/k75t for measurement r 11 : thermal resistance of die1 due to heating of die1 (c/w) r 12 : thermal resistance of die1 due to heating of die2 (c/w) r 13 : thermal resistance of die1 due to heating of die3 (c/w) r 14 : thermal resistance of die1 due to heating of die4 (c/w) r 21 : thermal resistance of die2 due to heating of die1 (c/w) r 22 : thermal resistance of die2 due to heating of die2 (c/w) r 23 : thermal resistance of die2 due to heating of die3 (c/w) r 24 : thermal resistance of die2 due to heating of die4 (c/w) r 31 : thermal resistance of die3 due to heating of die1 (c/w) r 32 : thermal resistance of die3 due to heating of die2 (c/w) r 33 : thermal resistance of die3 due to heating of die3 (c/w) r 34 : thermal resistance of die3 due to heating of die4 (c/w) r 41 : thermal resistance of die4 due to heating of die1 (c/w) r 42 : thermal resistance of die4 due to heating of die2 (c/w) r 43 : thermal resistance of die4 due to heating of die3 (c/w) r 44 : thermal resistance of die4 due to heating of die4 (c/w) p 1 : power dissipation of die1 (w) p 2 : power dissipation of die2. p 3 : power dissipation of die3 (w) p 4 : power dissipation of die4. t 1 : junction temperature of die1 due to heat from all dice (c) t 2 : junction temperature of die2 due to heat from all dice (c) t 3 : junction temperature of die3 due to heat from all dice (c) t 4 : junction temperature of die4 due to heat from all dice (c) r 11 r 12 r 13 r 14 p 1 = ? t 1 r 21 r 22 r 23 r 24 p 2 ? t 2 r 31 r 32 r 33 r 34 p 3 ? t 3 r 41 r 42 r 43 r 44 p 4 ? t 4 1 2 3 4 8 7 6 5 die1: led 1 die2: detector 1 die3: led 1 die4: detector 2
broadcom - 15 - acpl-k71t, acpl-k72t, acpl-k74t, and acpl-k75t data sheet thermal resistance mo del for acpl-k74t/k75t t a : ambient temperature (c) ? t 1 : temperature difference between die1 junction and ambient (c) ? t 2 : temperature deference between die2 junction and ambient (c) ? t 3 : temperature difference between die3 junction and ambient (c) ? t 4 : temperature deference between die4 junction and ambient (c) t 1 = (r 11 p 1 + r 12 p 2 + r 13 p 3 + r 14 p 4 ) + t a -- (1) t 2 = (r 21 p 1 + r 22 p 2 + r 23 p 3 + r 24 p 4 ) + t a -- (2) t 3 = (r 31 p 1 + r 32 p 2 + r 33 p 3 + r 34 p 4 ) + t a -- (3) t 4 = (r 41 p 1 + r 42 p 2 + r 43 p 3 + r 44 p 4 ) + t a -- (4) measurement data on a low k board: r 11 r 12 r 13 r 14 r 21 r 22 r 23 r 24 r 31 r 32 r 33 r 34 r 41 r 42 r 43 r 44 160 76 76 76 76 115 76 76 76 76 160 76 76 76 76 115
for product information and a complete list of distributors, please go to our web site: www.broadcom.com . broadcom, the pulse logo, connecting everything, avago technologies, avago, the a logo, and r 2 coupler are among the trademarks of broadcom and/or its affiliates in the united states, certain other countries and/or the eu. copyright ? 2012C2017 by broadcom. all rights reserved. the term "broadcom" refers to broadcom limited and/or its subsidiaries. for more information, please visit www.broadcom.com . broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. information furnished by broadcom is believed to be accurate and reliable. however, broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. av02-3786en C january 25, 2017

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